In the processing of a substrate, e.g., a semiconductor substrate or a glass panel such as one utilized in flat panel display manufacturing, plasma is often employed. As part of the processing of a substrate, for example, the substrate is divided into a plurality of dies, or rectangular areas, each of which will become an integrated circuit. The substrate is then processed in a series of steps in which materials are selectively removed (etching) and/or deposited (deposition) in order to form electrical components thereon.
In an example plasma process, a substrate is coated with a thin film of hardened emulsion (i.e., such as a photoresist mask) prior to etching. Areas of the hardened emulsion are then selectively removed, causing components of the underlying layer to become exposed. The substrate is then placed in a plasma processing chamber on a substrate support structure comprising a mono-polar or bi-polar electrode, called a chuck or pedestal. Appropriate etchant source are then flowed into the chamber and struck to form a plasma to etch exposed areas of the substrate.
Referring now to FIG. 1, a simplified diagram of a capacitively coupled plasma processing system is shown. In a common configuration, the plasma processing chamber may comprise a bottom piece 150 located in the lower chamber, and a detachable top piece 152 located in the upper chamber. A first RF generator 134 (source RF generator 134) generates a plasma 110 as well as controls the plasma density, while a second RF generator 138 (bias RF generator) that generates bias RF is commonly utilized to control the DC bias and the ion bombardment energy.
Further coupled to source RF generator 134 and bias RF generator 138 may be a matching network 136 that attempts to match the impedances of the RF power sources to that of plasma 110. Furthermore, a pump 111 is commonly utilized to evacuate the ambient atmosphere from a plasma processing chamber 102 (formed by the bottom piece 150 and the detachable top piece 152) in order to achieve the required pressure to sustain plasma 110.
Generally, an appropriate set of gases (input gases) is flowed into chamber 102 through showerhead/grounded electrode 109 from gas distribution system 122 to shut off valve 123 located in the lower chamber. In general, in order to achieve a substantially uniform enchant gas distribution across the surface of a substrate, a showerhead/grounded electrode 109, with a perforated or porous planar surface, is generally utilized. Gas distribution system 122 commonly comprises compressed gas cylinders containing plasma processing gases (e.g., C4F8, C4F6, CHF3, CH2F3, CF4, HBr, CH3F, C2F4, N2, O2, Ar, Xe, He, H2, NH3, SF6, BCl3, Cl2, WF6, etc). These plasma gases may be subsequently ionized to form plasma 110, in order to process (e.g., etch or deposit) exposed areas of substrate 114, such as a semiconductor substrate or a glass pane, positioned with edge ring 115 on an electrostatic chuck 116, which also serves as a powered electrode.
In addition, some type of cooling system 140 may be coupled to the chuck in order to achieve thermal equilibrium once the plasma is ignited. Cooling system 140 usually comprises a chiller that pumps a coolant through cavities in within the chuck, and helium gas pressurizes the small gap between chuck 116 and substrate 114. In addition to removing the generated heat, the helium gas also allows cooling system 140 to rapidly control heat dissipation. That is, increasing helium pressure subsequently also increases the heat transfer rate. Most plasma processing systems are also controlled by sophisticated computers comprising software programs. In a typical operating environment, manufacturing process parameters (e.g., voltage, gas flow mix, gas flow rate, pressure, etc.) are generally configured for a particular plasma processing system and a specific recipe.
In a common substrate manufacturing method, known as dual damascene, dielectric layers are electrically connected by a conductive plug filling a via hole. Generally, an opening is formed in a dielectric layer, usually lined with a barrier material (e.g., SiCN, SiC, SiON, Si3N4, etc.), and then subsequently filled with a conductive material (e.g., aluminum (Al), copper (Cu), etc.) that allows electrical contact between two sets of conductive patterns, thereby establishing electrical contact between two active regions on the substrate, such as a source/drain region. Excess conductive material on the surface of the dielectric layer is typically removed by chemical mechanical polishing (CMP). A blanket layer of silicon nitride is then deposited to cap the copper.
There are generally two commonly utilized approaches for manufacturing dual damascene substrates: via-first and trench-first. In one example of the via-first methodology, the substrate is first coated with photoresist, and then the vias are lithographically patterned. Next, an anisotropic etch cuts through the surface cap material, etches down through the low-k layer of the substrate, and stops on the barrier material, just above the underlying metal layer. Next, the via photoresist layer is stripped, the trench photoresist applied, and lithographically patterned. Typically, some of the photoresist may remain in the bottom of the via, or the via may be covered by an organic ARC plug, in order to prevent the lower portion via from being over-etched during the trench etch process. A second anisotropic etch then cuts through the surface cap material and etches the low-k material down to a desired depth. The second anisotropic etch forms the trench. The photoresist is then stripped, and the barrier material at the bottom of the via is opened with a very soft, low-energy etch that will not cause the underlying copper to sputter into the via. As described above, the trench and via are filled with a conductive material (e.g., aluminum (Al), Copper (Cu), etc.) and polished by chemical mechanical polishing (CMP).
An alternate methodology is trench-first. In one example, the substrate is coated with photoresist, and a trench lithographic pattern is applied. An anisotropic dry etch then cuts through a surface hard mask (e.g., SiCN, SiC, SiON, Si3N4, etc.) followed by stripping the photoresist. Another photoresist is applied over a trench hard mask, and then the vias are lithographically patterned. A second anisotropic etch then cuts through a cap layer and partially etches down into the low-k material. The second anisotropic etch forms partial vias. The photoresist is then stripped for trench etch over the vias with the trench hard mask. The trench etch then cuts through the cap layer and partially etches the low-k material down to desired depth. The second anisotropic etch also clears via holes at the same time, stopping on the final barrier material located at the bottom of the via. The final barrier material may then be opened with a special etch.
For example, a common via-first process generally may involve alternating between etch and deposition processes, performed on different plasma processing systems. To facilitate discussion, FIG. 2 illustrates a partially simplified set of example prior-art dual-damascene process steps, in which an idealized cross-sectional view of a layer stack is shown. In the discussions that follow, terms such as “above” and “below,” which may be employed herein to discuss the spatial relationship among the layers, may, but need not always, denote a direct contact between the layers involved. It should be noted that other additional layers above, below, or between the layers shown may be present. Further, not all of the shown layers need necessarily be present and some or all may be substituted by other different layers.
A partially etched substrate is shown at step (a). At the bottom of the layer stack, there is shown a metal layer 210, commonly aluminum or copper. Above the first metal layer is commonly metal barrier layer 212 (e.g., SiCN, SiC, SiON, Si3N4, etc.) that is commonly about 500 Å in thickness. Metal barrier layer 212 generally provides an etch stop when etching a low-k material immediately above. Above the metal barrier layer 212, there may be disposed an intermediate dielectric (IMD) layer 214 formed of a low-k material, e.g., one of SiCN, SiOC, BLACK DIAMOND™ supplied by Applied Materials, Inc. (www.appliedmaterials.com), CORAL™ supplied by Novellus Systems, inc. (www.novellus.com), TEOS, etc., that is commonly about 3.2 k Å in thickness. Above the IMD layer 214, there may be placed a cap layer 216 (e.g., SiCN, SiOC, BLACK DIAMOND™, CORAL™, TEOS, etc.) that is commonly about 500 Å in thickness. Above cap layer 216, there may be disposed a trench mask layer 218 (e.g., TiN, SiN, TaN, etc.) that is commonly about 300 Å. Above trench mask layer 218 may be another barrier layer 220 (e.g. PEOX, etc.) that is commonly about 300 Å. Above barrier layer 220 may be a BARC layer 222 that is commonly about 1.1 k Å. Finally above BARC layer 222 is photoresist layer 224, patterned with via 226, and is commonly about 2.8 k Å in thickness.
The substrate is transferred to a plasma processing etch chamber 202 (e.g., Lam Research 2300 Exelan™, etc.). At step (b), via 226 is etched down to metal barrier layer 212. At step (c), photoresist layer 224 and BARC layer 222 are removed (stripped). The substrate is then transferred to a cleaning chamber (not shown) and then to a photoresist deposition chamber 204. In general, the substrate must be cleaned when transported transport between manufacturing stations.
During the etch process, it is not uncommon for polymer byproducts to form on the top and bottom of a substrate. In general, polymers that form on the substrate during the etch process are organic and may be composed of Carbon (C), oxygen (O), Nitrogen (N), and/or Fluorine (F). However, as successive polymer layers are deposited as the result of several different etch processes, organic bonds that are normally strong and adhesive will eventually weaken and peel or flake off, often onto another substrate during transport. For example, substrates are commonly moved in sets between plasma processing systems via substantially clean containers, often called cassettes. As a higher positioned substrate is repositioned in the container, a portion of a polymer layer may fall on a lower substrate where dies are present, potentially affecting device yield. Hence, it is advantageous to minimize the number of times a substrate must be transported.
In general, the substrates are chemically cleaned using a combination of wet and dry processes. Wet processes generally involve placing the substrate in a tank (e.g., quartz, plastic, etc.) or on a spinning turntable, with a combination of solvents and acids (e.g., H2SO4, H2O2, NH4OH, HF, etc.) in order to remove organic and inorganic contaminant residues, respectively, and is usually followed by deionized (DI) water rinse and spine dry processes. Frequently, megasonics is utilized to enhance the cleaning efficiency of wet cleaning processes. Megasonics refers to a transducer mounted in the bottom of the tank that generates high power acoustic energy waves. This additional energy generally aids in removing particles from the substrate surface. Common examples of substrate spin process platforms with megasonic functionality include products supplied by SEZ Holding Ltd. (www.sez.com), Akrion, inc. (www.akrion.com), and Semitool, inc. (www.semitool.com).
For example, a common cleaning method called SC-1 (Standard Clean Solution #1) includes placing the substrate in a tank (e.g., quartz, plastic, etc.) or on a spinning turntable with a mixture of ammonium hydroxide (NH4OH), hydrogen peroxide (H2O2) and DI water (H2O). A typical concentration ratio for the mix is 1:1:5 for NH4OH:H2O2:H2O, although recently ratios as low as 0.05:1:5 have been utilized for better cleaning performance. SC-1 may be effective at removing organic contaminants from the surface of the substrate by continually oxidizing and then etching the surface of the substrate, thereby dissolving the contaminants into solution. It is typically operated in the temperature range of 50-70° C.
Another commonly utilized cleaning method called SC-2 (Standard Clean Solution #2) includes placing the substrate in a quartz or plastic tank with a mixture of hydrochloric acid (HCl), hydrogen peroxide (H2O2), and DI water (H2O). A typical concentration ratio for the mix is 1:1:5 for HCl:H2O2:H2O. In general, SC-2 solution is optimized for removing metal contaminants from the substrate surface, and usually follows the SC-1. Like the SC-1, it removes metals by continually oxidizing and then etching the surface of the wafer, thereby dissolving the contaminants into solution. It is typically operated in the temperature range of 50-70° C.
In addition, dry cleaning methods are also utilized. In general, dry cleaning is the process of removing contaminants from the substrate surface in the gas-phase. Removal of contaminants may be driven by either conversion of contaminant into volatile compound through chemical reaction, “knocking” the contaminant off the substrate surface via momentum transfer, or lift-off of the contaminant during slight etching of contaminated surface.
After the substrate is cleaned, it is transported to photoresist deposition chamber 204. In general, the substrate is placed on a spindle with a vacuum chuck that can hold the substrate during a high-speed rotation. Liquid photoresist is applied on the substrate surface, and the centrifugal force from the substrate rotation spreads the liquid over the whole substrate. The photoresist thickness is related to both viscosity and spin rate. That is, the greater the viscosity, the thicker the photoresist layer, whereas the greater the spin rate, the thinner the photoresist layer. The photoresist layer is then baked and exposed to UV radiation in order to convert it into a tough adhesive film over the surface of the substrate.
The substrate is then transferred to another plasma processing etch chamber 206. Generally, the photoresist is partially etched, leaving only a portion in via 226 to prepare the substrate for the subsequently metal barrier layer 212 etch. In a process commonly known as PREB (photoresist etch back), and O2 chemistry is commonly utilized in order to etch the photoresist back to a particular level. Here, that level is a point between the top and bottom of the via. Consequently, in order to prevent all of the photoresist from being removed, as would commonly be the case after a typical etch procedure is completed, the photoresist removal process must generally be attenuated.
One method of attenuating O2 chemistry, and hence controlling etch rate, may be the addition of a substantial amount of inert gases to the gas mixture. That is, as the volume of inert gas, such as argon, increases in the plasma processing chamber, a greater number of oxygen ions may collide and exchange energy with the inert gas molecules, absorbing thermal energy away from the substrate surface and hence reducing the photoresist etch rate.
Another method of attenuating O2 chemistry may be to pre-coat the plasma processing chamber with a material that has an affinity to the etchant in order to reduce the effective amount of etchant radicals in the plasma, and thus optimize the photoresist etch rate. For example, pre-coating the chamber with Cl2 may reduce the effective amount of oxygen radicals in the plasma that are available to etch the photoresist. In general, the greater the amount of pre-coat material, the fewer the number of available oxygen radicals available to the etching process.
However, the plasma processing chamber utilized for PREB may not be optimized for multiple consecutive process steps (e.g., PREB, trench etch, photoresist strip, etc.) that may require different process chemistries and chamber conditions. For example, in a typical etch chamber, it may be difficult to optimize the distribution of O2 in combination with the inert gases, across the surface of the substrate. However, as the plasma etches away the photoresist, areas on the substrate with a higher topography take longer to etch than areas with lower topography, creating non-uniform photo resist profiles among the trenches or vias as the case may be. In addition, the outer edge of the substrate may collect more electrons than the center (hence increasing the corresponding etch rate) since the edge is closer to the plasma potential. Hence it may be advantageous to asymmetrically distribute O2 across the surface of the substrate to insure a substantially uniform etch rate.
In addition, it is important to maintain substantially clean chamber conditions to minimize chamber memory effects and to maintain repeatable results between successive substrates. Since fully removing PREB contaminant deposits may be time consuming in many plasma processing systems, the plasma processing chamber is generally cleaned only when particle contamination levels reach unacceptable levels. However, it is often difficult to determine exactly when process conditions change beyond established parameters. There is generally no effective way to determine if a plasma process has moved outside of established parameters in-situ, without first initially processing and then subsequently testing partially manufacturing substrates. That is, after a batch of substrates has been processed, a sample substrate is removed from the batch and tested. Hence, in order to maximize the length of time between required cleanings, a dedicated plasma processing chamber is often preferred for a PREB process. Often, in order to maximize capital investment, older machines may be dedicated to specific tasks or processes, such as PREB.
After the PREB process is completed, the substrate may again be cleaned (not shown) as previously described, then transported to a plasma etch chamber 208 where barrier layer 220 (e.g. PEOX, etc.) may be removed, and metal barrier layer 212 may be etched. Initially, at step (f), barrier layer 220 is removed. In general, the remaining photoresist 228 after the previous PREB step shields metal barrier layer 212 from the plasma as barrier 220 is removed. That is, a portion of photoresist 228 is etched instead of metal barrier layer 212 etched. Next, in step (g), the remaining photoresist is removed (stripped) as previously described. Finally, metal barrier layer 212 is etched. In general, a liner removal process (LRM) may be utilized to etch metal barrier layer 212.
However, it is often advantageous in the processing of a substrate to combine as many steps as processing during a single processing session (i.e., in-situ) in order to minimize the handling of each substrate, and hence to improve yield, to improve the overall production throughput, to help minimize the amount of plasma processing chambers required, and to minimize substrate defects caused during substrate transport.